SOPHGO CV184x (CV184 Series) Vision Processor - Detailed Specification / Datasheets

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SOPHGO CV184x (CV184 Series) Vision Processor - Detailed Specification (V3.0.5 Updates)

This post summarizes the CV184 series product introduction and incorporates updates from the v3.0.5 terminal product line materials. It is intended as a concise, technical overview for engineers evaluating CV184x devices.

Executive Summary

  • CV184x series with dual-core architecture: ARM Cortex-A53 + RISC-V C906.
  • Self-developed TPU: 1.5 TOPS @ INT8, with BF16 mixed precision.
  • Self-developed 4K ISP V4.0 with advanced denoise, WDR, defog, and lens distortion correction.
  • Self-developed encoder with Intra4 mode for improved texture/detail retention at low bitrate.
  • OpenCLIP multi-modal support for detection, text-image retrieval, and zero-shot inference.
  • Full series software continuity with CV181: shared SDK, ISP tuning, TPU dev environment, and reference solutions.

Main Specifications (CV184 Series)

  • CPU: Dual-core ARM + RISC-V (CA53 up to 1.1 GHz, C906 up to 800 MHz).
  • ISP: 4K ISP V4.0; 3D noise reduction, WDR, digital WDR, image 3A, defog, lens distortion correction.
  • TPU: 1.5 TOPS @ INT8; BF16 mixed precision supported.
  • Encoding: H.265 / H.264 / MJPEG.
  • Video encode: Up to 8M@25 FPS + 2x 720P@25 FPS.
  • MIPI: 2x MIPI CSI, 1x MIPI DSI.
  • Integrated DDR: 512 Mb / 1 Gb / 2 Gb / 4 Gb.
  • Peripherals: USB 2.0, SD 3.0, UART, PWM, GPIO, I2C.
  • Fast boot, low power, secure boot.
  • Smart encoding support.

CV184 Series Comparison

Feature CV1841C-P CV1842C-P CV1842H-P CV1843H-P
Processor CA53 1.1 GHz + C906 800 MHz CA53 1.1 GHz + C906 800 MHz CA53 1.1 GHz + C906 800 MHz CA53 1.1 GHz + C906 800 MHz
DDR SiP DDR3 1 Gb DDR3 2 Gb DDR3 2 Gb DDR3 4 Gb
TPU ~1.5 TOPS (INT8) ~1.5 TOPS (INT8) ~1.5 TOPS (INT8) ~1.5 TOPS (INT8)
Package QFN-88 9x9 (Pin-to-Pin) BGA 10x10 (Pin-to-Pin) BGA 10x10 (Pin-to-Pin) BGA 10x10 (Pin-to-Pin)
Video In (VI) 2 video inputs: MIPI 2L + 1L or MIPI 4L 3 video inputs: MIPI 2L + 2L + DVP or MIPI 4L 3 video inputs: MIPI 2L + 2L + DVP or MIPI 4L 3 video inputs: MIPI 2L + 2L + DVP or MIPI 4L
Video Out (VO) MIPI DSI (2L) / BT656 / BT601 / BT1120 / 8080 / RGB666 MIPI DSI (4L) / BT656 / BT601 / BT1120 / 8080 / LVDS / RGB666 / RGB888 MIPI DSI (4L) / BT656 / BT601 / BT1120 / 8080 / LVDS / RGB666 / RGB888 MIPI DSI (4L) / BT656 / BT601 / BT1120 / 8080 / LVDS / RGB666 / RGB888
Audio ADC / DAC / I2S ADC / DAC / I2S ADC / DAC / I2S ADC / DAC / I2S
Encode H.265 / H.264 / MJPEG, 8M@25 (4:3 or 16:9) H.265 / H.264 / MJPEG, 8M@25 (4:3 or 16:9) H.265 / H.264 / MJPEG, 8M@25 (4:3 or 16:9) H.265 / H.264 / MJPEG, 8M@25 (4:3 or 16:9)
Ethernet 10/100 MAC PHY 10/100 RMII + 10/100 MAC PHY 10/100 RMII + 10/100 MAC PHY 10/100 RMII + 10/100 MAC PHY
ISP ISP V4.0: DRC / HDR / PFR / EE / 3A / MCTF ISP V4.0: DRC / HDR / PFR / EE / 3A / MCTF ISP V4.0: DRC / HDR / PFR / EE / 3A / MCTF ISP V4.0: DRC / HDR / PFR / EE / 3A / MCTF
Peripherals SD / USB 2.0 / I2C / PWM / RTC / UART / SPI / GPIO SD / USB 2.0 / I2C / PWM / RTC / UART / SPI / GPIO SD / USB 2.0 / I2C / PWM / RTC / UART / SPI / GPIO SD / USB 2.0 / I2C / PWM / RTC / UART / SPI / GPIO

Note: The CV184 series shares the same SDK, ISP tuning, TPU development environment, and smart reference solutions across variants.

ISP V4.0 Image Quality Enhancements

  • 3DNR (new MCTF algorithm): reduced ghosting, improved temporal noise stability, cleaner spatial denoise, sharper details.
  • Color noise reduction: low-frequency chroma noise removed, no color overflow at edges.
  • DRC (wide dynamic range): strong shadow lift, highlight control, improved contrast and color in high-contrast scenes.
  • Edge Enhance: wider tuning range, independent fine/coarse edge control, improved detail extraction with reduced haloing.
  • PFR (purple fringing removal): removes purple fringing without sacrificing edge color or saturation.

TPU Performance Benchmarks (8 Bank, 512 KB LMEM)

Model (TOPS) ResNet50_v2 (FPS) YOLO v5s (FPS) MobileNet_v2 (FPS) OpenCLIP (FPS)
CV1812C-P (1 TOPS) 27.5 15.6 172.7 -
CV1842C-P (1.5 TOPS) 38.5 28.3 261.9 4.07

Intra4 Encoding (Self-Developed)

  • Small-block Intra4 coding handles fine texture and motion details more effectively.
  • More precise local prediction reduces encoding error and preserves detail at low bitrates.

Built-in Intelligent Model Library (Selected)

  • Face detection and facial landmark detection.
  • Face recognition and face snapshot (full / face / half-body).
  • Human detection, head + body detection.
  • People counting with customizable line crossing.
  • Person + vehicle detection.
  • Safety helmet detection.
  • Hand detection, 21-point hand keypoints, gesture recognition.
  • Person + cat/dog detection.
  • Semantic segmentation.
  • Baby cry detection (audio).

Applications and Positioning

The CV184 series targets civil/consumer, operator, and professional security markets, with reference solutions for lightweight intelligent systems.

LEARN MORE

To request the official CV184 datasheet, SDK, or reference designs, email [email protected].
For system integration and custom solution support, visit https://aimorelogy.com.

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